Are you ready to shape the future of modern mobility systems by taking ownership of digital ASIC design? As a Senior ASIC Digital Lead, you take technical responsibility for the digital design scope across complex ASIC projects. You ensure a consistent and high-quality implementation from specification to integration, actively contributing to the design while driving alignment across all stakeholders and supporting robust DFT and test strategies.

• In this position, you take technical responsibility for the digital design scope in ASIC projects, coordinating specification, development, and integration across all stakeholders. You align requirements, structure execution, and drive key technical decisions to ensure a robust and consistent digital implementation.
• You act as the central coordination point for all digital design activities, while also contributing hands-on to implementation, ensuring practical feasibility and high-quality results.
• Based on system requirements and project objectives, you derive, consolidate, and implement the digital design concept, ensuring consistency across all development phases.
• You ensure that DFT and ATPG aspects are properly integrated into the design within the project, planning and aligning activities and ensuring the achievement of defined coverage targets.
• Last but not least, you take project-spanning responsibility for the ATPG/DFT flow, ensuring its stable operation, continuous improvement, and consistent application across projects. By analyzing test patterns, silicon data, and defect signatures, you identify root causes and drive targeted improvements in design, test quality, and methodologies. You further enhance efficiency and standardization by developing automation solutions and integrating new tools and methods.

• Education: completed university studies in Electrical Engineering, Computer Science or a comparable subject
• ​​​​​​Experience and Knowledge: several years of experience in digital ASIC development, including top-level integration; strong expertise in ATPG, test methodologies, and coverage analysis; hands-on experience with ATPG tools and flows; experience in failure analysis using pattern and silicon data; proven experience as Digital Lead in project environments; experience in coordinating external development partners and cross-functional teams; solid understanding of digital verification and interface validation; strong scripting skills (Python, Tcl, or shell); experience in methodology and flow development in digital and ATPG domains
• Personality and Working Practice: you approach tasks in a structured, responsible, and goal-oriented manner; you possess strong coordination and communication skills, enabling you to effectively drive technical topics across organizational boundaries
• Languages: fluent in written and spoken English; German is an advantage

*In accordance with our regulations, the gross annual salary for this position is at least 88.000 EUR for a 35h week (for a full year of employment and fulfillment of the eligibility requirements based on collective agreements) in the case of a comprehensive execution of job requirements. In addition, there is an individual, performance-related pay, a bonus based on the company's success, as well as employer benefits for the Bosch pension plan. We will be happy to discuss further details of our remuneration package, as well as (remuneration) development opportunities, with you during the application process.

Application deadline up to and including 20th of August 2026.